In recent years, as a nonvolatile memory to be called a post flash memory, a resistive nonvolatile memory RRAM (Resistive Random Access Memory) using a variable resistive element the electric resistance of which is reversibly changed by applying a voltage pulse is going to come into practical use.
FIG. 15 is a schematic structural diagram of the RRAM. An RRAM 100 shown in FIG. 15 has a very simple structure in which a lower electrode 103 serving as a second electrode, a variable resistor 102, and an upper electrode 101 serving as a first electrode are sequentially laminated. As the variable resistor 102, for example, a titanium oxide (TiO2) film, a nickel oxide (NiO) film, a zinc oxide (ZnO) film, and a niobium oxide (Nb2O5) film, which are oxides of transition metals, can be used (see Patent Document 1 and Non-Patent Document 1 described below). The RRAM 100 can reversibly change a resistance of the variable resistor 102 by applying a voltage pulse between the upper electrode 101 and the lower electrode 103. A resistance in a reversible resistance change operation is read to make it possible to realize a resistive nonvolatile memory.
A write (erase) characteristic in the RRAM is largely different from that of a flash memory. For example, in a mode called a bipolar switching mode, two changes in resistance including an increase in resistance and a decrease in resistance can be realized at several 10 nanoseconds by applying a low voltage of 1.5 V to 3 V. In this manner, writing information “1” (erasing operation) and writing information “0” (writing operation) can be simultaneously performed, i.e., data can be overwritten to make it possible to realize a rewriting operation at a high speed in units of bits. This RRAM is expected to be able to realize a reading/writing speed almost equal to that of a DRAM (Dynamic Random Access Memory).
A conventional DRAM has a memory cell configured by a switching MISFET and a capacitor connected in series with the switching MISFET to store information by accumulating electric charges in the capacitor. For this reason, due to the characteristic that causes information to be stored by accumulating electric charges in the capacitor, the DRAM has an advantage that the number of rewritable times is rarely limited.
On the other hand, the RRAM has a configuration in which information is rewritten by changing a resistance of a variable resistor. It is considered that the behavior of oxygen in a metal oxide constituting the variable resistor is responsible for the change in resistance of the variable resistor. More specifically, when an oxygen defect occurs in the metal oxide, the resistance of the metal oxide decreases. In contrast to this, when the oxygen defect is buried with oxygen again, the resistance may increase. More specifically, oxygen ions (O2−) move in an electric field applying direction by applying a high electric field to a high-resistance element, oxygen defects occur at positions where the oxygen ions are pulled out by the movement of the oxygen ion, and an electric resistance may decreases due to hopping conduction in which carriers are conducted between localized levels generated by the oxygen defects. With respect to an increase in resistance of a resistor the resistance of which is reduced, the resistor may be heated with Joule heat by causing a current to flow in a low-resistance portion, oxygen defects may be buried with oxygen when the current has a threshold value or more to increase the resistance of the resistor again.
Therefore, since writing of information in the RRAM is performed by a change in resistance with a physical change that is movement of oxygen ions in the metal oxide, in comparison with a DRAM in which information is written by accumulation or movement of electric charges, physical damage on an information storing unit (i.e., a variable resistor) is serious. More specifically, when a rewriting operation is repeated in the RRAM (resistance is repeatedly changed), a memory cell in which oxygen defects occur or oxygen cannot be recombined is consequently generated. In such a memory cell, a low-resistance state cannot be changed even though a voltage for rewriting is applied. This means that rewriting of information cannot be accurately executed.
More specifically, in the RRAM, in comparison with a DRAM, the number of rewritable times is disadvantageously limited. To that end, the RRAM requires a method of suppressing the number of rewritable times for the same memory cell and prolonging the life of each memory cell.
As a conventional method of prolonging the life of a nonvolatile memory cell, a wear leveling method that averages the numbers of using times of memory cells in a memory chip has been used. This method manages the numbers of rewritable times or orders of rewriting in units of blocks to prolong the life.
For example, the following Patent Document 2 describes a method of arranging erasing times counters in blocks, preferentially using blocks in which the values of the erasing times counters are small in all the blocks, and averaging the numbers of erasing times of all the blocks to prolong the life of the nonvolatile memory. The following Patent Document 3 describes a method that replaces a physical address value of a table that converts a logic address into a physical address with an idle physical address value read from an FILO (First in Last Out) in which idle physical address values are written to prevent a physical address at which data is rewritten from being biased so as to prolong the life of a nonvolatile memory.